The present invention relates to manufacturing techniques of semiconductor devices, and particularly relates to techniques effectively applied to calculating, with high accuracy, a polishing condition such as a polishing rate in chemical mechanical polishing (CMP) based on past polishing records. Also, the polishing condition such as a polishing rate can be utilized for making the calculation easy and high accuracy in performing the chemical mechanical polishing to stacked films.
The below described techniques have been studied by the present inventors for accomplishing the present invention, and the outline thereof is as follows.
Recently, as demands for higher integration of semiconductor devices are increased, chemical mechanical polishing techniques are recognized as highly important techniques in a field of high-accuracy planarization of semiconductor wafers. Chemical mechanical polishing is carried out while slurry composed of abrasive grains and chemical solution is supplied between a rotating polishing pad and a surface of a semiconductor wafer to be polished.
In such chemical mechanical polishing, prior to actual polishing of a product wafer, a reference polishing rate for a chemical mechanical polishing apparatus to be used is set by use of a dummy wafer. Several actual wafers are subjected to the preceding polishing at the set reference polishing rate, excess or deficiency of the polishing time is checked from the result of the preceding polishing, and the optimum polishing time suitable for the already set reference polishing rate is set to carry out the polishing of subsequent products. The reference polishing rate is a very important factor for determining the quality of polishing, including setting accuracy of the polishing time. Therefore, the reference polishing rate is periodically revised in the subsequent product polishing, so that a value as accurate as possible is used.
As described above, in the chemical mechanical polishing, before polishing of a product wafer is started, a considerable number of preceding operations are required for setting various polishing conditions including setting of the reference polishing rate of the product wafer, for example, by using a dummy wafer, performing the preceding polishing, and the like.
Also, when the appropriate reference polishing rate cannot be set, the chemical mechanical polishing carried out for a predetermined time based on the above-mentioned polishing rate results in deficiency of polishing or excessive polishing, whereby additional polishing or disposal of the polished wafer is caused. As a result, a throughput in a chemical mechanical polishing process significantly deteriorates.
Thereat, techniques for efficiently calculating the polishing rate with high accuracy are demanded. As one of such techniques, there is proposed a technique in which: a latest polishing rate is calculated from an actual polishing time and a differential between film thickness data before the polishing and film thickness data after the polishing; and process recipe information from a plant host computer is set as an optimum recipe in a chemical mechanical polishing apparatus (See Patent Document 1: Japanese Patent Laid-open No. 11-186204).
There is also proposed a technique in which an optimum polishing time of an object to be polished is calculated based on a calculating formula arbitrarily set by using operators and parameters including pre-polishing thickness of the object to be polished, a polishing time, post-polishing thickness, and a target value of the thickness of the object to be polished (See Patent Document 2: Japanese Patent Laid-open No. 2002-154053).
Furthermore, there is also proposed a technique in which estimation polishing rates are calculated and an estimation polishing time is determined for each type, process, and manufacturing equipment (See Patent Document 3: Japanese Patent Laid-open No. 2002-334135).
Also, there is proposed a technique in which, in view of a topological state relating to irregular (concave/convex) patterns of the stacked films, chemical mechanical polishing of stacked films in an STI (Shallow Trench Isolation) structure is carried out by, for example, converting, to a silicon nitride film, silicon oxide and silicon nitride films to be subjected to the chemical mechanical polishing and uniformly calculating the polishing rate (see Patent Document 4: U.S. Patent Laid-open No. US 2004-0023490).